March 20, 2010

Instruction-Level Parallelism

Last modified: Friday, August 03, 2007 

Abbreviated as ILP, Instruction-Level Parallelism is a measurement of the number of operations that can be performed simultaneously in a computer program. Microprocessors exploit ILP by executing multiple instructions from a single program in a single cycle.

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ExtremeTech: Exploiting ILP Through Pipelining
Essentially, we're processing five instructions in parallel, referred to as "Instruction-Level Parallelism (ILP)". If it took five clock cycles to completely execute an instruction before we pipelined the machine, we're now able to execute a new instruction every single clock. We made our computer five times faster, just with this "simple" change.

The Journal of Instruction-Level Parallelism
The Journal of Instruction-Level Parallelism (JILP) is an electronic archival journal dedicated to soliciting, thoroughly reviewing, and publishing state-of-the-art papers in all areas of instruction-level parallelism (ILP.)

Related Categories

Measurement

Microprocessors

Related Terms

instruction

instruction cycle

instruction register

operator

program

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